PCIe FPGA Card

XUP-VVH

UltraScale+ FPGA PCIe Board with Integrated HBM2 Memory

4x 100GbE Network Ports and VU37P FPGA

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Overview

BittWare’s XUP-VVH is an UltraScale+ VU37P FPGA-based PCIe card ideal for high-density datacenter applications that demand high memory bandwidth. The UltraScale+ FPGA helps these demanding applications avoid I/O bottlenecks with integrated High Bandwidth Memory (HBM2) tiles on the FPGA that support up to 8 GBytes of memory at 460 GBytes/sec.

Along with the integrated memory, the UltraScale+ VU37P offers up to 2.8 million logic elements, which gives designers incredible performance potential — yet with a power density that makes thermal management difficult. The XUP-VVH meets this challenge with BittWare’s Viper platform, supporting large FPGA loads, up to 256 GBytes DDR4, and 4x 100 Gbps Ethernet.

BittWare’s Viper platform uses advanced computer flow simulation to drive the physical board design in a thermals first approach, including the use of heat pipes, airflow channels, and arranging components to maximize the limited available airflow in a server. Viper boards are passive by default, with active cooling as an option.

Key Features

4x 100GbE via 4 QSFP28

Up to 256 GBytes DDR4 SDRAM

VU37P FPGA: 2.8 million LCs 8GBytes HBM2

Block Diagram, Data Sheet and Specifications

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Specifications

FPGA

  • Virtex UltraScale+
    • VU37P
    • 8 GBytes of HBM2 high-bandwidth DRAM
    • Core speed grade - 2
  • Contact BittWare for other FPGA options

On-board Flash

  • Flash memory for booting FPGA

External memory

  • 2 DIMM sites, each supporting:
    • Up to 128 GBytes DDR4 x72 with ECC
    • Up to 576 Mbits dual QDR-II+ x18 (2 independent 288 Mbit banks)

Host interface

  • x16 Gen3 interface direct to FPGA

USB ports

  • Micro USB: access to BMC and FPGA JTAG

Utility

  • Connects to a breakout board for UART, 1 PPS input, and 10MHz clock input

UltraPort SlimSAS

  • 2 UltraPort SlimSAS on rear edge connected to FPGA via 16x GTY transceivers
  • Can support an additional x16 or x8 PCIe interface (requires soft IP core and additional slot)

QSFP cages

  • 4 QSFP28 (zQSFP) cages on front panel connected directly to FPGA via 16 transceivers
  • Each supports 100GbE, 40GbE, 4x 25GbE, or 4x 10GbE and can be combined for 400GbE

Board Management Controller

  • Voltage, current, temperature monitoring
  • Power sequencing and reset
  • Field upgrades
  • FPGA configuration and control
  • Clock configuration
  • I2C bus access
  • USB 2.0
  • Voltage overrides

Cooling

  • Standard: double-width passive heatsink

Electrical

  • On-board power derived from 12V PCIe slot & an AUX connector (8-pin)
  • Power dissipation is application dependent

Environmental

  • Operating temperature 5°C to 35°C

Form factor

  • 3/4-length, standard-height PCIe dual-slot board
  • 10 x 4.37 inches (254 x 111.15 mm)

Development Tools

System development

  • BittWorks II Toolkit - host, command, and debug tools for BittWare hardware

FPGA development

  • FPGA Examples - example Vivado projects
  • AMD Tools - Vivado® Design Suite

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