We have a webinar covering high-performance network security, specifically MACsec and IPsec at high speeds. Our partner Xiphera will present along with Altera and BittWare. Register today and you can also get the recording (including live Q&A)!
This week we’re in Denver at the SC23 event, showing FPGA Accelerator solutions, including new cards and some exciting partner demos! Stop by to see Atomic Rules PCIe 5 data movement solutions, Liquid Market Solutions (LMS) running the UberNIC live with CXL, AI accelerator solutions from EdgeCortix and Groq, Genomics Acceleration featuring examples from Intel and Wasai, and Cloud Datacenter solutions from VMAccel!
We’re showing our IA-860m Agilex card, which is shipping this quarter. And we’re also showing two new Versal cards in partnership with LDA Technologies.
Learn more:
This week we are in New York at the STAC Exchange Fall event, showing solutions for financial acceleration. Stop by to see the Liquid-Markets-Solutions (LMS) running the ÜberNIC live with CXL!
We’re also showing AI solutions from Groq and Myrtle.ai, compression acceleration from Eideticom, and our latest FPGA cards.
Read our latest article that compares performance of DDR4 modules with the new DDR5. It’s good to see how the future will bring higher-performance DDR5, but also to have a perspective on how the higher-performing options like HBM2e compare.
We’re at FMS this week, showing our newest computational storage acceleration products. We’ve recently announced two I-Series cards featuring M.2 storage and MCIO expansion, so if you are at the show be sure to chat with us! Booth 734.
For a data recorder, how many drives are required for a given sustained data rate? Find the answer in this informative white paper.
FPGA Server TeraBox 2102D 2U Server for FPGA Cards Legacy Product Notice: This is a legacy product and is not recommended for new designs. It
Go Back to IP & Solutions UDP Offload Engine UOE IP Core for 10/25/50/100GbE Atomic Rules UDP Offload Engine (UOE) is a UDP FPGA IP
We examine our reference design for sustained 100 Gb/s capture to host DDR4 over a PCIe bus. Read the white paper, then request the App Note for even more detail!
