XUP-PL4 PCIe Card with Xilinx Virtex UltraScale+ VU3P FPGA
PCIe FPGA Card XUP-PL4 UltraScale+ FPGA Low-Profile PCIe Card Dual QSFP28s and DDR4 Need a Price Quote? Jump to Pricing Form Ready to Buy? Check
Run the same models & workloads you run today with lower latency and greater power efficiency
Want to accelerate your edge AI workloads? There are many options to get started, whether you’re in early-stage development or ready to go to volume production on a complex module.
Get the SAKURA-I chip on a low-profile PCIe card that's perfect for benchtop development. Includes MERA Compiler Framework and tools, with the DNA neural processing engine, embedded into SAKURA-I.
Includes MERA Compiler Framework and tools, the DNA neural processing engine IP, bundled with BittWare's PCIe accelerator cards featuring Intel Agilex 7 FPGAs. Tap here for more details on this solution.
With a power-efficient ASIC, customized cards or microelectronics modules are a perfect fit.
EdgeCortix SAKURA-I is a TSMC 12nm FinFET co-processor (accelerator) delivering class-leading compute efficiency and latency for edge artificial intelligence (AI) inference. It is powered by a 40 trillion operations per second (TOPS), single core Dynamic Neural Accelerator® (DNA) Intellectual Property (IP), which is EdgeCortix’s proprietary neural processing engine with built-in runtime reconfigurable data-path connecting all compute engines together. DNA enables the new SAKURA-I AI co-processor to run multiple deep neural network models together, with ultra-low latency, while preserving exceptional TOPS utilization. This unique attribute is key to enhancing the processing speed, energy-efficiency, and longevity of the system-on-chip, providing exceptional total cost of ownership benefits. The DNA IP is specifically optimized for inference with streaming and high-resolution data.
Automotive
Defense & Security
Robotics & Drones
Smart Cities
Smart Manufacturing
EdgeCortix SAKURA-I AI Co-processor enabled devices are supported by the heterogeneous compiler and software framework – EdgeCortix MERA that can be installed from a public pip repository, enabling seamless compilation and execution of standard or custom convolutional neural networks (CNN) developed in industry-standard frameworks. MERA has built-in integration with Apache TVM, and provides simple API to seamlessly enable deep neural network graph compilation and inference using the DNA AI engine in SAKURA-I. It provides profiling tools, code-generator and runtime needed to deploy any pre-trained deep neural network after a simple calibration and quantization step. MERA supports models to be quantized directly in the deep learning framework, e.g., Pytorch or TensorflowLite.
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PCIe FPGA Card XUP-PL4 UltraScale+ FPGA Low-Profile PCIe Card Dual QSFP28s and DDR4 Need a Price Quote? Jump to Pricing Form Ready to Buy? Check
White Paper FPGA Acceleration of Convolutional Neural Networks Overview Convolutional Neural Networks (CNNs) have been shown to be extremely effective at complex image recognition problems.
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