IA-860m PCIe Accelerator with Intel Agilex FPGA
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TK242
Lossless 200G Packet Capture Solution
TK242 from Atomic Rules is a bitstream that provides lossless packet capture for two 100GbE streams – out-of-the-box with no FPGA programming required. The TK242 IP runs on BittWare cards with Intel® Agilex™ FPGAs. Sustaining PCIe Gen4 x16 throughput over 200 Gb/s from Ethernet to user space host memory, TK242 provides a runtime programmable 200 Gb/s RSS filter, 6-tuple, 64K entry flow-table and queue routing. All formatting – including PCAP generation – is done in hardware, offloading that function from the host CPU. High-performance timing capability includes nanosecond-resolution packet head timestamping for fusing two 100GbE streams into a single time-monotonic ordered stream.
200 Gb/s RSS Filter
PCIe Gen4 x16
Nanosecond timestamps
Lossless Capture
Features
- Lossless packet capture of two 100 GbE streams
- Nanosecond timestamps with time-ordered merge
- Generation of multiple PCAP files in hardware
- Exceptionally low host CPU core burden
- Open-source C host example design gets you started quickly
BittWare offers TeraBox integrated servers perfect for building high-density capture solutions
Data Sheet and Product Details
Detailed Feature List
Overall
- Lossless, protocol-agnostic, simultaneous ingest of two 100G 100GBASE-CR4 sources
- Nanosecond resolution packet head timestamping on both ingress ports
- Online, in-flight fusing of both ports into a single time-monotonic ordered stream
- Runtime programmable 200 Gb/s RSS filter, 6-tuple, 64K entry flow-table, queue routing
- Online, in-flight generation in hardware of multiple, parallel PCAP format byte streams
- PCIe Gen4 x16 sustained throughput over 200 Gb/s from Ethernet to user space host memory
- Exceptionally low host CPU utilization – all formatting, including PCAP generation, in hardware
Two 100 GbE Inputs
- QSFP-DD provides two 100G CAUI-4 Rx
- Each of the two parallel input channels has:
- 100 GbE PHY/PCS/MAC with RX head timestamps
- Atomic Rules MTAU Layer-2 pre filter
- Rich per-port Rx statistics
- TimeServo system timer
- Nanosecond resolution time
- Time ordered packet merge of both streams
- Single 200 Gbps / 300 Mpps output stream
RSS and Distribute
- Line rate 200 Gbps / 300 Mpps RSS 6-tuple hashing
- Software programmable polynomial
- Default Microsoft Toeplitz weights
- 64K Entry flow redirection table
- Each entry identifies a unique PCAP flow direction or identifies a flow to be discarded
- Use cases include:
- Send everything allowed to a single PCAP flow
- RSS spread allowed incoming packets among the multiple PCAP flows
- Forward only specific matches to host for lawful intercept
- Multiple Parallel H/W PCAP generators (P2PCAP)
- Nanosecond per-packet headers added
- Each supports the full 200 Gbps / 300 Mpps flow
Use Cases
There are many ways to leverage TK242 for your own solution. Here are a few of them:
Use it as-is: an out-of-the-box, plug-and-go packet capture solution.
Add the FPGA board, the host, plug in, and capture packets using the Atomic Rules supplied example design. The design is limited to what is demonstrated.
Point your host application code at the in-memory hugepages filled with PCAP formatted byte streams.
The example design is your starting point. Add other capabilities before, during, and after packet capture. Most features are programmed through the DPDK.org standard API.
Modify the example design to provide other functionality.
For example, each P2PCAP flow could become its own libpcap stream, feeding its own host core.
About the Company
Provider of FPGA IP components and solutions for networking and quality-of-time. IP offerings include Arkville data mover for high-throughput, low-latency communications between host memory and FPGA fabric logic.
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