Synthetic Traffic Generator Reference Design
White Paper Synthetic Traffic Generator Reference Design Overview Synthetic traffic generators enable lab testing of FPGA designs with network ports. There are other applications, but
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At the extreme of FPGA server density, the TeraBox 1400DN gives the highest level of compute and network capability in a 1U chassis. This server provides up to 3.2 Terabits/second of I/O and the power of 4 of our largest Achronix Speedster7t, Intel Stratix 10 or Xilinx UltraScale+ FPGAs.
This innovative product is made possible through a powerhouse partnership of integrated technologies from Intel, Dell EMC and BittWare.
Four Achronix Speedster 7t, Intel Stratix 10, or Xilinx UltraScale+ FPGA cards in a 1U rackmount chassis
The TeraBox 1400DN supports up to four dual-slot BittWare PCIe FPGA cards. Choose from a variety of cards based on the Speedster 7t, Stratix 10, or UltraScale+ FPGAs. System specs will vary greatly, depending on the FPGA card you select. For example, with four BittWare UltraScale+ PCIe cards, which support up to 512 Gbytes of DDR4 per card, the chassis can support as much as 2 Terabytes of DDR4 on the FPGA cards in 16 banks. With four Stratix 10 cards, each chassis supports 10 million logic elements.
Dell’s C4140 rackmount 1U server featuring dual Intel Skylake processors is the ideal platform to unleash the energy-efficient acceleration of BittWare’s FPGA cards. This FPGA-optimized 1U server delivers unrivaled performance density and value for a range of compute-intensive applications, including machine learning.
Choosing a TeraBox FPGA server means knowing you are getting a pre-configured and tested solution. This includes setup and installation of your FPGA cards and associated hardware, your choice of operating system, and development tools. Your TeraBox arrives ready for use—giving your team more time for development and deployment.
The TeraBox 1400DN supports many of BittWare’s Achronix, Intel, or Xilinx FPGA-based PCIe cards. The table below lists system totals when populated with four cards*:
FPGA | Cards in Server | Memory | I/O | Processing | |
S7t-VG6 | Speedster 7t | 4 | 32 banks GDDR6 (up to 32 GBytes) | 1.8 Terabit/sec 24x 100/50/40/25/10 GbE | 2.75 million 6-input lookup tables (LUTs) 750 Mbits embedded RAM |
520N-MX | Stratix 10 MX | 4 | 8 banks DDR4 (up to 1 Terabyte) 16 banks QDRII+ (up to 2.3 Gbits) | 1 Terabit/sec 16x 100/50/40/25/10 GbE | 8.4 million system logic elements 64 GBytes HBM2 |
XUP-VV8 | UltraScale+ VU13P | 4 | 16 banks DDR4 (up to 2 Terabytes) 32 banks QDRII+ (up to 9.2 Gbits) | 2.3 Terabits/sec 32x 100/50/40/25/10 GbE | 15.2 million system logic cells Up to 49.152 DSP slices |
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White Paper Synthetic Traffic Generator Reference Design Overview Synthetic traffic generators enable lab testing of FPGA designs with network ports. There are other applications, but
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