Panel Discussion: How Today’s FPGAs are Taming the Data Deluge Problem From Gen5 to AI, NOCs to RF at the Edge
Panel Discussion How Today’s FPGAs are Taming the Data Deluge Problem From Gen5 to AI, NOCs to RF at the Edge Watch the recording for
Jump-start your SmartNIC project with the open-source Corundum IP core! It’s got the basic framework for FPGA-based network acceleration, ready for you to adapt and extend. The expectation is for users to add their own custom logic and host software to build SmartNICs, saving time by using the foundational network packet processing elements in Corundum. A user application area allows for easier targeting of multiple card types.
What sets Corundum apart from other open-source FPGA NIC frameworks are features like scatter/gather, PTP, and robust host DMA integration. The overall performance targets general-purpose packet processing applications at line rates up to 100 Gb/s.
The IP core targets BittWare FPGA cards with AMD Virtex UltraScale+ and Altera Agilex 7 devices. Specific supported cards are listed under specifications. As an open-source project, customers may use the IP to port to other BittWare cards.
Traditional NIC: Assignment in Software
Corundum NIC: Assignment in Hardware
Corundum is an open source FPGA-based NIC and platform for in-network compute.
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Panel Discussion How Today’s FPGAs are Taming the Data Deluge Problem From Gen5 to AI, NOCs to RF at the Edge Watch the recording for
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