250-SoC

Block Diagram

Board Specifications

FPGA

• Xilinx Zynq UltraScale+
  • ZU19EG FFVD1760 package
  • Core speed grade -2
  • Application ARM: Quad-core Cortex-A53 MPCore 1.5GHz
  • Real-Time ARM: Dual-core Cortex-R5 MPCore 600MHz
  • Graphics Processor: Mali-400 MP2
• Contact BittWare for other MPSoC options

On-board DDR4 SDRAM

• DDR4 SDRAM FPGA Fabric Memory
  • One 4GB bank of DDR4 SDRAM x72 bits
  • Transfer Rate: 2400 MT/s
• DDR4 SDRAM MPSoC Memory
  • One 4GB bank of DDR4 SDRAM x72 bits
  • Transfer rate: 2400 MT/s

Host interface

• x16 mechanical PCIe Gen3 capable
• Configurable as x16 up to Gen3, or two x8 PCI in bifurcated slots

QSFP cages

• 2 front panel 4-25Gbps-lane QSFP28 cages
• User programmable low jitter clocking supporting 10/25/40/100GbE
• Each QSFP28 can be independently clocked

OCuLink

• 1 back panel 8-25Gbps-lane OCuLink connector
• 1 back panel 8-16Gbps-lane OCuLink connector
• Flexible configuration: NVMe, PCIe, 10/40/100GbE, OpenCAPI
• 2 additional optional 8-lane OCuLink connectors (25 & 16Gbps)

Board control (front panel)

• RJ45 1GbE access to the ARM processor
• USB connector for UART to ARM processor

Datacenter Deployment, Health Monitoring & Reporting

• On-board power, voltage and temperature monitoring
• Field flash update via software
• SMBus controlled anti-bricking, fallback and multiboot
• SMBus access to unique board data and temperature sensor

Cooling

• Active and passive heatsink options

Electrical

• On-card power derived from PCIe slot supplies
• Power dissipation is application dependent
• Typical FPGA power consumption ~50W

Environmental

• Operating temperature: 5°C to 35°C

Quality

• Manufactured to Manufactured to ISO9001:2008 IPC JSTD-001 -Class III
• RoHS compliant

Form factor

• Half-height, half-length PCIe board
• Full-height PCI bracket option

Development Tools

FPGA development

• BIST – Built-In Self-Test for CentOS 7 provided with source code (pinout, gateware, PCIe driver and host test application)

Application development

• Xilinx Tools – Vivado Design Suite HLx Editions: HDL and C/C++ with HLS

Deliverables

• 250-SoC FPGA board
• Built-In Self-Test (BIST)
• 1-year access to online Developer Site
• 1-year hardware warranty