UltraScale+ FPGA PCIe Board with VU13P

4x 100GbE and up to 512GB DDR4

XUP-VV4 PCIe card

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Legacy Product Notice:

This is a legacy product and is not recommended for new designs. It is still available for purchase, but development tools and software are no longer maintained for compatibility with the latest FPGA tools and operating systems. Minimum order quantities (MOQs) may apply. Contact BittWare for details.


BittWare’s XUP-VV4 is an UltraScale+ VU13P FPGA-based PCIe card, ideal for high-density datacenter applications. The AMD UltraScale+ VU13P FPGA gives designers incredible performance potential, with 3.8M logic elements — yet with a power density that makes thermal management difficult. The XUP-VV4 meets this challenge with BittWare’s Viper platform, supporting large FPGA loads, up to 512 GBytes DDR4, and 4x 100 Gbps Ethernet.

BittWare’s Viper platform uses advanced computer flow simulation to drive the physical board design in a thermals first approach, including the use of heat pipes, airflow channels, and arranging components to maximize the limited available airflow in a server. The XUP-VV4 features air cooling by default, but liquid cooling is also available. The board features the D2104 lidless package from AMD—allowing the heat pipes to contact the die directly, instead of through the heat spreader lid. 

Key Features

4x 100GbE via 4 QSFP28

Air or Liquid cooled

VU13P FPGA: 3.8 million LCs

Block Diagram, Data Sheet and Specifications

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  • Virtex UltraScale+
    • VU13P in D2104 package
    • Core speed grade - 2
  • Contact BittWare for other FPGA options

On-board Flash

  • Flash memory for booting FPGA

External memory

  • 4 DIMM sites, each supporting:
    • Up to 128 GBytes DDR4 x72 with ECC
    • Up to 576 Mbits dual QDR-II+ x18 (2 independent 288 Mbit banks)

Host interface

  • x16 Gen3 interface direct to FPGA

USB ports

  • Micro USB: access to BMC and FPGA JTAG


  • Connects to a breakout board for UART, 1 PPS input, and 10MHz clock input

UltraPort SlimSAS

  • 2 UltraPort SlimSAS on rear edge connected to FPGA via 16x GTY transceivers
  • Can support an additional x16 or x8 PCIe interface (requires soft IP core and additional slot)

QSFP cages

  • 4 QSFP28 (zQSFP) cages on front panel connected directly to FPGA via 16 transceivers
  • Each supports 100GbE, 40GbE, 4x 25GbE, or 4x 10GbE and can be combined for 400GbE

Board Management Controller

  • Voltage, current, temperature monitoring
  • Power sequencing and reset
  • Field upgrades
  • FPGA configuration and control
  • Clock configuration
  • I2C bus access
  • USB 2.0
  • Voltage overrides


  • Standard: double-width passive heatsink
  • Optional: double-width liquid cooling


  • On-board power derived from 12V PCIe slot & an AUX connector (8-pin)
  • Power dissipation is application dependent


  • Operating temperature 5°C to 35°C

Form factor

  • 3/4-length, standard-height PCIe dual-slot board
  • 10 x 4.37 inches (254 x 111.15 mm)

Development Tools

System development

  • BittWorks II Toolkit - host, command, and debug tools for BittWare hardware

FPGA development

  • FPGA Examples - example Vivado projects
  • AMD Tools - Vivado® Design Suite

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