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The New IA-220-U2 with PCIe Gen 4
FPGA Computational storage PROCESSOR (CSP)
Gen 4 PCIe NVMe
Eideticom NoLoad Support
BittWare’s IA-220-U2 Accelerates NVMe FLASH SSDs by Sitting Alongside as another U.2 Module
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What is Computational Storage?
SNIA defines several components collectively called “computational storage.” For a typical IA-220-U2 deployment, the acceleration tasks are called CSS (computational storage services).
For example, the IA-220-U2’s Agilex FPGA can perform compression much faster than a CPU—even surpassing the transfer rate of the storage system for transparent compression.
What is a CSP?
CSPs (like the IA-220-U2) work alongside FLASH, providing accelerated computational storage services (CSS) by performing compute, such as compression or encryption. This lets users build out storage using standard SSDs instead of being locked into a single vendor’s FLASH storage.
What features make the IA-220-U2 a powerful CSP?
- PCIe Gen4 interface for twice the bandwidth of Gen3-based solutions.
- Optional NoLoad provides a ready-to-deploy solution from Eideticom.
- Intel Agilex FPGA with 1.4M logic elements.
Generation 4.0
Double the Bandwidth!
Built with the latest PCIe Gen4 interface, the IA-220-U2 can transfer up to twice the bandwidth of Gen3 devices.
Solution Feature: Eideticom's NoLoad™
NoLoad Transforms the IA-220-U2 Into a Powerful CSP That's Easy to Deploy
- Deployable enterprise-class solution
- Choice of user-space or kernel-space implementation for minimal software changes
FPGA Hardware Components
NoLoad provides FPGA IP and host components. For the FPGA IP, you can see in the diagram the main components. More details are below:
- NVMe Front End. The PCIe endpoint, NVMe Controller, and DMA Engine are all implemented in hardware and support PCIe Gen4 x4 for the IA-220-U2’s standard U.2 interface.
- CSS Functions. The orange components are hardware-accelerated computational storage services (CSS) such as compression or encryption.
Host Software Components
As a complete solution, NoLoad provides host software with a choice of implementation:
- libnoload. By modifying the application to use the libnoload library, the OS can remain untouched.
- NoLoad FS. Another option uses the NoLoad FS (file system) as a shim on top of traditional file systems. The advantage here is user applications need zero changes to take advantage of accelerated storage.
Block Diagram, Data Sheet and Specifications
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Request the Hardware Reference Guide (HRG)
The HRG gives you much more detail about the card such as block diagrams, tables and descriptions.
Board Specifications
FPGA
- Intel Agilex AGF014
- Core speed grade -3: I/O speed grade -3
- Contact BittWare for other Agilex FPGA options
On-board DDR4 SDRAM
- Two banks of DDR4 SDRAM x 72 bits
- 4GB per bank
- Transfer Rate: 2400 MT/s
Host interface
- PCIe Gen4 x4
- U.2 Connector
- Compliant to SFF-8639
Datacenter deployment
- On-board NVMe-MI compliant SMBus controller (Spec. 1.0a)
- Field flash update via software or SMBus
- SMBus FPGA flash control: anti-bricking, fallback and multiboot
- SMBus access to unique board data and temperature sensor
Back panel features
- User LEDs accessible
Development features
- JTAG connector for access to the FPGA, flash and debug tools
- GPIO connector
Power supply monitoring and reporting
- Voltage monitoring
- Temperature monitoring
- Fault condition reporting to FPGA
Cooling
- U.2 drive case optimized for cooling with passive heatsink
Electrical
- Hot swapping tolerant
- On-card power derived from U.2 supplies
- Power dissipation is application dependent
- Typical FPGA power consumption ~20W
- Card designed to deliver up to 25W power consumption
Environmental
- Operating temperature: 5°C to 35°C
- Cooling: forced air
Quality
- Manufactured to IPC-A-610 Class 2
- RoHS compliant
Form factor
- U.2 compliant 2.5” Drive Form Factor
- Height: 15mm
Development Tools
FPGA development
- BittWare SDK including PCIe driver, libraries, and board monitoring utilities (Linux support only)
Application development
- Supported design flows - Quartus Prime Pro (HDL, Verilog, VHDL, etc.)
r1 v1
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