Arkville DPDK Data Mover Using Agilex FPGAs
BittWare Webinar Arkville PCIe Gen4 Data Mover Using Intel® Agilex™ FPGAs Webinar The Arkville IP from Atomic Rules was recently updated to support Intel Agilex
PCIe FPGA Card
385A-SoC
Intel Arria 10 with SoC Low-Profile PCIe Card
System-on-Chip FPGA with dual QSFPs and DDR4
Obsolete Product Notice:
This is an obsolete product and is no longer available for purchase. Contact BittWare for a recommended newer product.
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Overview
The 385A-SoC™ low profile accelerator card provides a powerful computing and I/O platform for FPGA and ARM-based development and deployment across a range of application areas including high performance computing, image processing, and network analytics.
Key Features
Intel Arria 10 SoC SX 660
2x QSFP+ for 10/40 Gbps
Embedded BSP (ARM)
Block Diagram, Data Sheet and Specifications
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Specifications
FPGA
- Intel Arria 10 SX
- 660 SX in F34 package
- Core speed grade -2
On-board Flash
- Flash memory for booting FPGA
On-board memory
- One bank of DDR4 SDRAM x 72 for FPGA fabric, 4GB @ 2133MT/s
- One bank of DDR4 SDRAM x 40 for ARM processor, 2GB @ 2133MT/s
Host interface
- x8 Gen3 interface direct to FPGA
QSFP cages
- 2 QSFP+ cages on front panel connected directly to FPGA via 8 transceivers
- User programmable low jitter clocking supporting 10/40 GbE
- Each QSFP can be independently clocked
- Clocking options:
- Network recovered with jitter attenuation
- QSFP clocking: user programmable, or CPRI, 1GbE
- External clock input, 1PPS input
Power supply monitoring and reporting
- On-board Altera USB Blaster
- Voltage monitoring
- Temperature monitoring
- Fault condition reporting to FPGA
Cooling
- Standard: single-width active heatsink (embedded fan)
- Optional: single-width passive heatsink
Electrical
- On-board power derived from 12V PCIe slot
- Power dissipation is application dependent
Environmental
- Operating temperature: 5°C to 35°C
Quality
- Manufactured to IPC-A-610 Class 2
- RoHS compliant
Form factor
- Half-height, half-length PCIe single-slot board
- 2.713 x 6.6 inches (68.9 x 167.6 mm)
Development Tools
FPGA development
- BIST - Built-In Self-Test for CentOS 7 provided with source code (pinout, gateware, PCIe driver & host test application)
Application development
- Supported design flows - Quartus Prime Pro (HDL, Verilog, VHDL, etc.)
Deliverables
- 385A-SoC FPGA board
- Built-In Self-Test (BIST)
- Full and half-height PCI back plates available
- 1-year access to online Developer Site
- 1-year hardware warranty
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