For a data recorder, how many drives are required for a given sustained data rate? Find the answer in this informative white paper.
Meet the Powerful IA-840F:
Enterprise-Class Intel Agilex Based
FPGA Accelerator
> Flexible, Customizable Hardware
> oneAPI Software Support
Tap Into the Power of Agilex
The new Intel Agilex FPGAs are more powerful, draw less power and add I/O features like PCIe Gen4.
- 2nd-Generation HyperFlex Architecture: Up to 40 percent higher performance or up to 40 percent lower total power compared with Stratix 10 FPGAs.
- DSP Innovation: Supports hardened BFLOAT16 and up to 40 teraflops of digital signal processor (DSP) performance (FP16).
- Advanced memory support: DDR4, QDR-II+ (through custom BittWare DIMMs) and Intel Optane DC persistent memory.
Agilex Acceleration Video
DSP Innovation
The IA-840F FPGA features a configurable DSP engine with hardened support for single-precision FP32, half-precision FP16, BFLOAT16, and INT8 calculations. Agilex also supports low-precision configurations from INT7 to INT2 for maximum flexibility—ideal for evolving AI workloads.
2nd Gen Intel® Hyperflex™ Architecture
Continuous improvements to Intel Hyperflex deliver improved performance compared to Stratix 10 device designs. The 2nd Gen architecture thus greatly improve the productivity of customers and reduce time-to-market.
Hardened Protocol Support
The Agilex FPGA delivers optimal power, performance and logic utilization efficiency by integrating hardened protocols for many popular functions including 100G Ethernet and PCIe Gen 4.
Generation 4.0
Double the Bandwidth!
Built with the latest PCIe Gen4 interface, the IA-840F can transfer up to twice the bandwidth of Gen3 devices.
Enterprise-class for Deployment
Ramp to product with the power of Molex
The IA-840F is built on BittWare’s enterprise-class foundation stones: existing products and processes that are already proven through extensive validation. When it’s time to ramp to production, this means a faster turnaround and utilizing the same hardware you have been using for development.
Flexible Expansion IO
With QSFP-DDs and MCIO connectors, the IA-840F offers a range of flexibility to meet your application needs:
- Three QSFP-DDs provide up to 600Gbps with hard IP for 10/25/100GbE links (up to 4× 100GbE total).
- MCIO expansion ports let you optimize the IA-840F for your application with PCIe expansion such as:
- 4× Gen4 x4 root ports
- 1× Gen4 x16 root port
- 1× Gen4 x16 endpoint
Inquire about customized Molex connectors/cables as required for your application.
Supporting Intel's oneAPI
Develop faster + reuse code in this software-orientated tool flow
Supporting high-level software tool flows is critical to a growing customer base who want to take advantage of heterogenous architectures. The new oneAPI from Intel is designed around code re-use while providing similar performance to other high-level tools.
BittWare recently completed an updated 2D FFT white paper using oneAPI and found the performance matches our optimized OpenCL-based approach.
Browse Our Resources
We examine our reference design for sustained 100 Gb/s capture to host DDR4 over a PCIe bus. Read the white paper, then request the App Note for even more detail!
BittWare customer OVHcloud built a powerful anti-DDoS solution using FPGA technology, specifically the XUP-P3R card.
High-speed networking can make timestamping a challenge. Learn about possible solutions including card timing kits and the Atomic Rules IP TimeServo.
Block Diagram, Data Sheet and Specifications
Board Specifications
FPGA
- Intel Agilex FPGA
- AGF027 in an R2581A package
- Core speed grade -2: I/O speed grade -2
- Contact BittWare for other FPGA options
On-Board flash
- 2Gbit Flash memory for booting FPGA
External memory
- 2x 288-pin DIMM slots, each supporting up to 32GB DDR4 SDRAM modules (up to 64GB total)
- Designed-in support for other DIMM modules such as QDR SRAM. Contact BittWare for details.
- 2x banks on-board DDR4, up to 32GB each
Host interface
- x16 Gen4 interface direct to FPGA, connected to PCIe hard IP
QSFP-DD cages
- 3 QSFP-DD cages on front panel connected directly to FPGA via 24 transceivers
- User programmable low jitter clocking supporting 10/25/40/100GbE
- Each QSFP-DD can be independently clocked
- Jitter cleaner for network recovered clocking
- Multi-rate hard MAC+FEC for 10/25/100GbE
MCIO
- 2x edge connectors supporting 4x Gen4 x4 PCIe root complexes, 2x Gen4 x8 endpoints, or 1x Gen4 x16 root complex or endpoint
External clocking
- 1 PPS and 10MHz ref clk front panel inputs
USB micro
- USB access to BMC, USB-JTAG, USB-UART
Board Management Controller
- Voltage, current, temperature monitoring
- Power sequencing and reset
- Field upgrades
- FPGA configuration and control
- Clock configuration
- Low bandwidth BMC-FPGA comms with SPI link
- USB 2.0
- PLDM support
- Voltage overrides
Cooling
- Standard: double-width passive heatsink
- Optional: triple-width active heatsink (with fan)
- Optional: double-width liquid cooling
Electrical
- On-board power derived from 12V PCIe slot & two AUX connectors
- Power dissipation is application dependent
- Typical max power consumption TBD
Environmental
- Operating temperature: 5°C to 35°C
Quality
- Manufactured to ISO9001:2015 IPC-A-610-Class III
- RoHS compliant
- CE, FCC & ICES approvals
Form factor
- Standard-height PCIe dual-slot board
- 4.376 x 10.5 inches (111 x 266.7 mm)
Development Tools
System development
- Software development toolkit including PCIe driver, libraries, and board monitoring utilities
Application development
- Supported design flows - Intel FPGA OneAPI Base Toolkit, Intel High-Level Synthesis (C/C++) & Quartus Prime Pro (HDL, Verilog, VHDL, etc.)
Interested in Pricing or More Information?
Our technical sales team is ready to provide availability and configuration information, or answer your technical questions.