FPGA Acceleration of Binary Weighted Neural Network Inference
White Paper FPGA Acceleration of Binary Weighted Neural Network Inference One of the features of YOLOv3 is multiple-object recognition in a single image. We used
520N-MX
Hardware Reference Guide Download
Get detailed information on one of our most powerful FPGA cards!
The hardware reference guide (HRG) is the user guide for the 520N-MX. With it, you’ll gain extensive knowledge about the functional features of the card including:
- Built-in Self Test (BIST)
- The Board Management Controller (BMC)
- Clocking circuit
The guide provides extensive diagrams, tables and descriptions for your evaluation. Please fill in the form to request the HRG.
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