PCIe FPGA 卡

250-SoC

Low Profile UltraScale+ MPSoC Card

250-SoC low-profile PCIe FPGA card

概述

The 250-SoC features an AMD Zynq UltraScale+ MPSoC device offering both programmable logic and 64-bit ARM processors. This powerful, feature-rich device coordinates data transfer between two 100GbE network ports, on-board DDR4 memory and a PCIe Gen 3 host interface and is ideal for data center, networking and edge compute workloads.

主要特點

2x 100GbE via 2 QSFP28

8GB DDR4

ZU19EG MPSoC: 64-bit Cortex A53 ARM Zynq UltraScale+

框圖、數據表和規格

想要瞭解更多詳情?

Request the Hardware Reference Guide (HRG)

The HRG gives you much more detail about the card such as block diagrams, tables and descriptions.

規格

FPGA

  • AMD Zynq UltraScale+
    • ZU19EG FFVD1760 package
    • 核心速度等級 -2
    • Application ARM: Quad-core Cortex-A53 MPCore 1.5GHz
    • Real-Time ARM: Dual-core Cortex-R5 MPCore 600MHz
    • Graphics Processor: Mali-400 MP2
  • Contact BittWare for other MPSoC options

板載 DDR4 記憶體

  • DDR4 SDRAM FPGA Fabric Memory
    • One 4GB bank of DDR4 SDRAM x72 bits
    • 傳輸速率:2400 噸/秒
  • DDR4 SDRAM MPSoC Memory
    • One 4GB bank of DDR4 SDRAM x72 bits
    • Transfer rate: 2400 MT/s

Host interface

  • x16 mechanical PCIe Gen3 capable
  • Configurable as x16 up to Gen3, or two x8 PCI in bifurcated slots

QSFP cages

  • 2 front panel 4-25Gbps-lane QSFP28 cages
  • 用戶可程式設計低抖動時鐘,支援 10/25/40/100GbE
  • 每個 QSFP28 可獨立計時

Board control (front panel)

  • RJ45 1GbE access to the ARM processor
  • USB connector for UART to ARM processor

Datacenter Deployment, Health Monitoring & Reporting

  • On-board power, voltage and temperature monitoring
  • Field flash update via software
  • SMBus controlled anti-bricking, fallback and multiboot
  • SMBus 訪問獨特的電路板數據和溫度感測器

冷卻

  • Passive heatsink

Electrical

  • On-card power derived from PCIe slot supplies
  • Power dissipation is application dependent
  • Typical FPGA power consumption ~50W

Environmental

  • Operating temperature: 5°C to 35°C

品質

  • Manufactured to IPC JSTD-001 -Class 2
  • 符合 RoHS 標準

Form factor

  • Half-height, half-length PCIe board
  • Full-height PCI bracket option

Development Tools

FPGA 開發

  • BIST - 內建 CentOS 7 自檢功能,提供原始程式碼(引腳排列、門件、PCIe 驅動程式和主機測試應用程式)

應用開發

  • AMD 工具 - Vivado Design Suite HLx 版本:HDL 和 C/C++ 與 HLS

交付

  • 250-SoC FPGA board
  • Built-In Self-Test (BIST)
  • 1 年訪問在線開發者網站
  • 1 年硬體保修

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