Open-Source 100G NIC IP from Corundum
Go Back to IP & Solutions Corundum Open-Source 100G NIC IP Core Jump-start your SmartNIC project with the open-source Corundum IP core! It’s got the
FPGAs offer high performance, workload flexibility and energy-efficient operation for a range of HPC applications.
The FPGA value proposition for HPC has strengthened significantly in recent years.
These are key advantages emerge as demonstrated in our BWNN white paper:
Working alongside CPUs, FPGAs provide part of a heterogeneous approach to computing. For certain workloads, FPGAs provide significant speedup versus CPU—in this case 50x faster for machine learning inference.
FPGAs have a range of tools to best tailor to the application. The hardware fabric adapts to use only what’s needed, including hardened floating-point blocks when required. For BWNN’s weights, we used only a single bit, plus mean scaling factor, and still achieved acceptable accuracy but saving significant resources.
Power per watt is not only important at the edge, it’s in the power budget of datacenters in both space and cost of power. FPGAs can uniquely deliver the latest efficient libraries yet at far lower power per watt than CPUs.
With BittWare’s exclusive optimized OpenCL BSP, you’re able to both tap into software-orientated developers and the latest software libraries. This allowed us to quickly adapt the YOLOv3 framework, which has improved performance over older ML libraries.
We target applications when demand to process storage outpaces traditional architectures featuring CPUs.
FPGAs allow customers to create application-specific hardware implementations that exhibit the following properties:
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Go Back to IP & Solutions Corundum Open-Source 100G NIC IP Core Jump-start your SmartNIC project with the open-source Corundum IP core! It’s got the
Intel® oneAPI Unified Programming Model Across Multiple Architectures Overview Supporting high-level software tool flows is critical to a growing customer base who want to take
Go Back to IP & Solutions UDP Offload Engine UOE IP Core for 10/25/50/100GbE Atomic Rules UDP Offload Engine (UOE) is a UDP FPGA IP
White Paper Synthetic Traffic Generator Reference Design Overview Synthetic traffic generators enable lab testing of FPGA designs with network ports. There are other applications, but