Product Operation

As shown in the block diagram, Arkville has both a hardware and software component. The hardware component is an IP core that resides in the FPGA, producing and consuming AXI streams of packets making ingress or egress. The software component is a DPDK PMD “net/ark”, the Arkville DPDK poll-mode driver.

Together, an Arkville solution looks to software like a “vanilla” line rate agnostic FPGA-based NIC (without any specific MAC). DPDK applications do not need to change significantly in order to enjoy the advantages of FPGA hardware acceleration.

Detailed Feature List


  • Ready-to-Go Solution to FPGA/GPP Packet Movement
  • 4 Physical Queue-Pairs (RX/TX) Standard; Up to 128 Physical Queue-Pairs
  • Single PCIe Physical Function (PF) supporting multiple ports
  • Concurrent, Full-Duplex Upstream and Downstream Data Movement

GPP/Software Specific

  • DPDK Arkville PMD in DPDK 17.05
  • Tested extensively in with DPDK Test Suite (DTS)
  • Unencumbered Application BAR (ABAR) for FPGA Application

FPGA/Hardware Specific

  • AXI Streaming interfaces for packet movement
  • Up to 256 Gbps, 500 Mpps burst traffic (Two 64 Byte wide, 250 MHz, AXI streams)
  • Dedicated Application BAR (ABAR) AXI4-Master for the FPGA Application
  • Integrated with Intel Quartus QSys

Reference Examples

Atomic Rules provides Arkville example designs that may be used as a starting point for your own solutions. These include:

  • Four-Port, Four-Queue 10 GbE example (Arkville + 4×10 GbE MAC)
  • Single-Port, Single-Queue 100 GbE example (Arkville + 1×100 GbE MAC)

Sample Implementation Results

Device Speed 6LUTs FFs BRAM Fmax
Intel A10 -I1 100k 100k 100 250
Xilinx VUS+ -2 100k 100k 100 250