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| Flexible Architecture |
| AFW Technical Specs << Previous | Next >> |
- Common interfaces and standard component structure promote reuse
- Static component configuration capabilities built in
- Varied component functionality and sizing
- Data width and format user defined
- Application dependent parameters: PLL clock configuration, multi-rate support
- Device specific optimization settings: FIFO depths, primitives
- Layered architecture for portability between BittWare boards, abstracting the board and physical interfaces from the custom processing
- Change boards/FPGAs with little work
- Dynamic (run-time) reconfiguration capabilities
- Memory mapped control/configuration and status
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Figure 1: AFW Project Abstraction Levels
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