ATLANTiS FrameWork (AFW)

Benefits of Using an FPGA

• Can be configured to provide high-speed, flexible I/O
• Considerable computational throughput even at low clock rates
• Not constrained by a specific instruction set or by hardwired processing units
• Reconfigurable, allowing substantial changes on the fly
• Well-suited to fine grain parallelism
• Continue to advance, while DSPs seem to have hit a wall
• A proven cost/performance lead over DSPs

FPGA Limitations

Given all these potential resources, the FPGA by itself does not do a thing. Developers must begin with a blank slate.

• No peripheral infrastructure
• No common API
• Minimal libraries
• Developer must build all on-chip processing and control paths
• No standard methodology for implementing an FPGA design
• Modifying the design is time-consuming and expensive
• FPGA development requires a specific skill set and specialized tools

FPGA Development Process

For a developer to cost-effectively turn the FPGA's potential into a product of significant value, they must:

• Develop project specifications and requirements
• Architect the design and create a model of the system
• Implement the design in the FPGA

Actually implementing the design in the FPGA is the hard part. This process includes:

• Developing a component written in a Hardware Description Language (HDL), either from scratch or re-using an existing core, making sure to properly handle all data and control interfaces.
• Creating and integrating the project, which includes:
  • defining timing constraints
  • creating adapters for custom data interfaces
  • defining a physical interface
  • configuring all I/O

Even after all of these considerations, the project simulation may work, but the implementation might not work on the board.

AFW was specifically designed to address these issues.