| S4AM-RW-AABB-CDEFG-HHI |
| RW | Ruggedization
0U = Commercial (0C to 50 C)*
|
| AA | FPGA Size
23 = Altera Stratix IV GX 230*
53 = Altera Stratix IV GX 530†
|
| BB | FPGA Speed Grade
C2 = Commercial Speed Grade 2†
C3 = Commercial Speed Grade 3*
C4 = Commercial Speed Grade 4†
I3 = Industrial Speed Grade 3†
I4 = Industrial Speed Grade 4†
|
| C | DDR3 Bank A Size
0 = None
7 = 256 MB†
8 = 512 MB*
9 = 1 GB†
|
| D | DDR3 Bank B Size
0 = None
7 = 256 MB†
8 = 512 MB*
9 = 1 GB†
|
| E | QDRII+ Bank A Size
0 = None*
2 = 9 MB
|
| F |
QDRII+ Bank B Size
0 = None*
2 = 9 MB
|
| G | FINe Flash Size
5 = 64 MB†
6 = 128 MB*
|
| HH | Front Panel
00 = No Front Panel†
F1 = Full Size - VITA 57 Cutout†
F2 = Full Size - SerDes Cutout*
M1 = Mid Size - VITA 57 Cutout†
M2 = Mid Size - SerDes Cutout†
|
| I | Front Panel SerDes Connector
0 = Not Populated†
1 = Populated*
|
|
|
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