| GTV6-RW-XYZZ-AABBC-DEFGHI-JJJ-KKK-L |
| RW | Ruggedization
0U = Commercial*
1U = Air Cooled, uncoated†
1C = Air Cooled, conformal coating†
2C = Conduction cooled, conformal coating†
3C = Conduction cooled, conformal coating †
|
| X | Cluster A DSPs
0 = 0 TS201S DSPs †
1 = 1 TS201S DSP †
2 = 2 TS201S DSPs*
|
| Y | Cluster B DSPs
0 = 0 TS201S DSPs †
1 = 1 TS201S DSP †
2 = 2 TS201S DSPs*
|
| ZZ | DSP Speed
50 = 500 MHz*
|
| AA | Cluster A FPGA Size
00 = Not populated †
90 = Altera Stratix II GX 90 †
13 = Altera Stratix II GX 130*
|
| BB | Cluster B FPGA Size
00 = Not populated †
90 = Altera Stratix II GX 90 †
13 = Altera Stratix II GX 130*
|
| C | FPGA Speed Grade
3 = Speed grade 3 (fastest) †
4 = Speed grade 4*
5 = Speed grade 5 (slowest) †
|
| D | VXS Connector
0 = Not populated †
1 = Populated w/o key housing †
2 = Populated w/ key housing*
|
| E | VME
0 = Not populated †
1 = Populated*
|
| F | XMC
0 = Not populated †
1 = Populated*
|
| G | SerDes Connector
0 = Not populated*
1 = Populated† (air cooled only)
|
| H | PrPMC+ J4 Connector
0 = Not populated †
1 = Populated*
|
| I | RCB
0 = Rear Panel I/O to PMC P4 †
1 = Rear Panel I/O to FPGA †
2 = PMC P4 to FPGA*
|
| J | Cluster A Memory Banks 1-3
0 = None †
6 = 256 MBytes DDR2 SDRAM †
7 = 512 MBytes DDR2 SDRAM*
|
| K | Cluster B Memory Banks 1-3
0 = None †
6 = 256 MBytes DDR2 SDRAM †
7 = 512 MBytes DDR2 SDRAM*
|
| L | Oscillator
0 = Standard
|
|
|
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