S5-6U-VPX [S56X]

Overview

BittWare’s S5-6U-VPX (S56X) is a rugged 6U VPX card based on the high-bandwidth, power-efficient Altera Stratix V GX/GS FPGA. Designed for high-end applications, the Stratix V provides a high level of system integration and flexibility for I/O, routing, and processing. When combined with BittWare’s Anemone FPGA co-processor, the ARM® Cortex™-A8 control processor, and the ATLANTiS FrameWork FPGA development kit, the S56X creates a flexible and efficient solution for high-performance signal processing and data acquisition. The board provides a configurable 48-port multi-gigabit transceiver interface supporting a variety of protocols, including Serial RapidIO, PCI Express, and 10GigE. Additional I/O interfaces include Ethernet, RS-232, JTAG, and LVDS. The board features up to 8 GB of DDR3 SDRAM as well as Flash memory for booting the FPGAs. Providing additional flexibility are two VITA 57 FMC sites for enhancing the board’s I/O and processing capabilities.

VITA 57 FMC Sites for Processing and I/O Expansion

The S56X features two FMC (FPGA Mezzanine Card) sites, which provide multi-gigabit transceivers and LVDS, along with clocks, I2C, JTAG, and reset connected to the Stratix V. The sites are based on the VITA 57 mezzanine standard for FPGA I/O, enabling designers to customize the S56X to their individual needs with optional FMC I/O boards.

Altera Stratix V GX/GS FPGA

The Altera Stratix V FPGA is optimized for high-performance, high-bandwidth applications with integrated transceivers (up to 14.1 Gbps) supporting backplanes and optical modules. It supports 1.6 Tbps of serial switching capability and up to 3,926 18 x 18 variable precision multipliers. The Stratix V also provides PCI Express via a hard IP block and supports configuration by PCI Express using the existing PCI Express link in your application. For additional flexibility, the Stratix V supports transceiver and core reconfiguration on-the-fly while other portions of the design are running. The FPGA is supported by BittWare’s ATLANTiS FrameWork and provides seamless routing of all on-board data, I/O, and memory.

Anemone: Floating Point Co-processor for FPGA

Two optional Anemone104 processors are available on the S56X as co-processors for the Stratix V FPGA. Anemone is a truly C-programmable floating point compute engine that achieves superior power efficiency and processing performance by working alongside an FPGA as a co-processor. The FPGA handles all the memory, I/O interfacing, protocol processing, and special functions, in addition to any computational tasks it may perform. This leaves the Anemone free to efficiently perform complex processing tasks.

Anemone enables partitioning of processing between software and hardware, and it reduces system development cost by enabling out-of-the-box execution of applications written in regular ANSI-C. Ideal for implementing complex algorithms and for implementing processing with changing requirements, Anemone is a low risk and low power way to add processing resources.

I/O Interfaces

The S56X provides a variety of interfaces for high-speed serial I/O as well as debug support. The rear panel VPX interface includes GigE and 32 multi-gigabit transceiver channels to the Stratix V FPGAs. In addition, a Cyclone III FPGA is used to interface 48 LVDS and 20 GPIO from the VPX backplane to the Stratix V FPGAs. A utility header provides access to USB, RS-232, JTAG, and Ethernet interfaces for debug and programming support.

ARM® Cortex™-A8 Control Processor

An ARM® Cortex™-A8 control processor provides a complete control plane interface for the S56X, facilitating separate control and data planes, and greatly simplifying the development of data plane I/O and processing. This is implemented in a 800 MHz TI AM3871 ARM processor running Linux. The ARM runs BittWorks server for full remote access via the BittWorks II Toolkit.

ATLANTiS FrameWork: Simplified FPGA Development

ATLANTiS FrameWork (AFW) is a library of FPGA components that includes preconfigured physical interfaces, infrastructure, and examples for BittWare’s Altera FPGA-based COTS boards. In a typical FPGA design, physical interface development can account for the majority of the development time; however, AFW saves months of effort by providing critical physical interface components that are tested and configured to meet the BittWare board’s specific requirements. To help further reduce development time, AFW includes many optional components for system IP, interconnect, and simulation and test. Working example projects for each supported board, which illustrate how to move data between the board’s different interfaces, along with full simulation and synthesis example projects allow customers to have a board up and running within hours. AFW includes all source code and is provided with the BittWorks II Toolkit.

Figure 1: ATLANTiS FrameWork Architecture Overview

Development Tools

BittWare offers complete software support for the S56X with its BittWorks II software tools. The BittWorks II Toolkit is a collection of libraries and applications for BittWare’s Stratix IV and V FPGA-based boards. Designed to make developing and debugging the applications for BittWare’s boards easy and efficient, the Toolkit provides the glue between the host application and the hardware. The Toolkit supports 32-bit, and 64-bit Windows and Linux platforms.

Specs

Board Architecture

VITA 57 FMC Sites

• Two VITA 57 FMC sites

• 8x multi-gigabit transceivers per site

• 80 LVDS pairs per site

• Clocks, I2C, JTAG, and reset

FPGAs

• 2 Altera® Stratix® V GX/GS FPGAs

• Supported by BittWare’s ATLANTiS™ FrameWork

• 48 full-duplex, multi-gigabit transceivers @ up to 14.1 GHz

• Up to 952,000 logic elements per FPGA

• Up to 62 Mb on-chip memory (per FPGA)

• 1.4 Gbps LVDS performance

• Up to 3,926 18×18 variable-precision multipliers (per FPGA)

• Embedded HardCopy Blocks

Anemone FPGA Co-processor (Optional)

• Two 16-core Anemone104 processors

• C-programmable floating point co-processor for FPGAs

• 600 MHz multicore processor

• 19.2 GFLOPS in 1 Watt core power (per processor)

External Memory

• Four banks of up to 2 GByte DDR3 SDRAM configured as x64

• Two 128 MByte banks of Flash memory for booting FPGA and ARM

ARM® Cortex™-A8 Control Processor

• 800 MHz ARM® Cortex™-A8 processor (TI AM3871) running Linux

• Control port interface to Stratix V FPGAs

• GigE, PCIe, and SATA interfaces

• Supports host- and Flash-based booting of Stratix V FPGAs

• Runs BittWorks server for full remote access via the BittWorks II Toolkit

Rear Panel I/O

• 4 GigE (2 1000BaseT and 2 1000BaseX)

• 16 multi-gigabit transceivers from rear panel (VPX) to each Stratix V (32 total)

• 48 LVDS pairs (24 Tx and 24 Rx) and 20 GPIO from VPX backplane to the Stratix V FPGAs via a Cyclone III FPGA

Debug I/O (Utility Header)

• RS-232 ports to Stratix V and ARM

• Ethernet interface (10/100)

• JTAG debug interface to the Stratix V

Size

• VPX 6U single slot

Development Tools

System Development

• BittWorks II Toolkit – host, command, and debug tools for BittWare hardware

• BittWorks II Porting Kit – source code and prebuilt ports for porting the BittWorks II Toolkit to other operating systems

• BWIO – software library for controlling I/O on BittWare boards

FPGA Development

• Altera Quartus® II software

ATLANTiS FrameWork

• FPGA development kit

• Physical interface components

• Library of optional components for system, interconnect, simulation, and test IP

• Board, I/O, and timing constraints

• Example Quartus projects

• Full ModelSim simulations

• Software components and drivers

Accessory Boards

• BittWare BWBO breakout board for USB, JTAG, RS-232, and Ethernet access

Block Diagram

Ordering

* Default
† Contact BittWare for availability.

Compatible Products

FPGA COTS Hardware

• AA-FMC [AAFM]
  Quad Anemone™ Floating Point Co-Processor VITA-57 FMC
• 3FAD
  1 - 4 Channels 8-bit, up to 5 GSPS ADC VITA-57 FMC
• 3FAE
  1-4 Channels 10-bit, up to 5 GSPS ADC VITA-57 FMC
• 3FAN
  8 Channels 12-bit, 65 MSPS ADC VITA-57 FMC
• 3FAP
  4 Channels 14-bit, 250 MSPS ADC VITA-57 FMC
• 3FDJ
  1 - 4 channels 16-bit, up to 1 GSPS DAC VITA-57 FMC
• 3FTV
  2 channels, 14-bit, 250 MSPS ADC and 2 channels, 16-bit, 800 MSPS DAC VITA-57 FMC
• BWBO
  BittWare Breakout Board

Value-Add Products for FPGA

• ATLANTiS™ FrameWork [AFW]
  FPGA Development Kit for BittWare’s Altera FPGA Boards
• Anemone104™ Co-Processor for FPGAs [AN104]
  Low-Power, C-Programmable, Floating Point

Development Tools

• BittWorks II Toolkit
  Application Development Software for BittWare COTS Boards
• Altera Quartus® II
  Quartus II Software: The Proven Productivity Leader
• Anemone Development Kit (ADK)
  Development Kit for Anemone104™ Co-Processor for FPGAs
• Insight™ from Paralant
  Optimized Libraries for Anemone104™ Co-Processor for FPGAs