Small Standard Form Factor DSP

Interface ASIC Facilitates Highly Integrated Boards

Jeffry Milrod
President, BittWare, Inc.

In recent years, there has been a rapidly growing demand for DSP implemented on small form factor boards. For years, DSP has been the fastest growing technology segment of the standard-bus market, primarily on large formats such as VME and cPCI. With DSP technology becoming more accessible, in terms of both ease of use and cost, more and more applications can benefit from its use, fueling the increasing desire for small DSP boards.

Up until now, most small, embedded DSP subsystems have been implemented on non-standard formats. Although this ensures a well-optimized design for each specific need, building from scratch is costly, risky, and can greatly delay time to market. For years, the market has embraced the advantages (and inherent compromises) of using standard commercial-off-the-shelf (COTS) boards as system-level building blocks. This logic applies equally well to the world of small form factor DSP.

Small Form Factor Standards: PC/104 and PC/104-Plus

By far, the leading small form factor embedded board standard is PC/104. The PC/104 form factor was developed by AMPRO Computers in 1987 to address the needs of the industrial computing market. With that in mind, it was designed to be simple, small (3.6" x 3.8"), and generally low cost. Using a unique self-stacking mechanical design, PC/104 boards eliminate the need for backplanes or card cages. Although PC/104 has met with unqualified success, the ISA bus interconnect technology makes it quite antiquated, and has limited its acceptance into more complex embedded applications.

In particular, DSP has been implemented on PC/104 for years with marginal success. The bandwidth restrictions limit its usefulness to applications requiring either very little data flow (generally a DSP oxymoron) or complete DSP subsystems with A/D and/or D/A. The latter is impractical for all but the simplest system due to the size restrictions of PC/104. Another approach was to build systems that provided alternate data transport mechanisms, with the ISA used only for command and control. However, private sub-buses and great gobs of cabling cobbled on to a PC/104 board made a mockery of the term 'standard'.

Enter PC/104-Plus. This extension of the PC/104 specification adds a self-stacking 32-bit/33MHz PCI bus in addition to the tried and true ISA bus. Now we have a world-class embedded board format that is technically competitive with cPCI in terms of data throughput yet with some real differences. Although it can't support hot-swap (for obvious reasons) and will not extend to 64-bit PCI, PC/104-Plus is very compact and cost-effective (due to the lack of backplane and card cage). Note, however, that this is not the start of a new set of bus wars - cPCI and PC/104-Plus use the same bus. Nor is this the start of a form factor war, these are very different and complimentary board technologies.

DSP Integration Challenges

While the addition of PCI has opened the door to more complex system implementations, the compact size of the PC/104-Plus form factor, one of its greatest strengths, presents significant challenges to board vendors implementing DSP sub-systems. At the core of the PC/104 market, industrial computing vendors have been able to aggressively attack this problem through the use of ASICs and chip-sets from the ultra-high volume personal computing world. There are a lot of chips out there to interface Intel processors to virtually anything, not so for DSP processors.

Further complicating the problem, most DSP chips do not have native PCI, and most DSP systems require multiple processors with lots of memory, as well as signal interface I/O. Being special purpose processors, most DSPs also have limited peripheral sets, generally just a parallel bus, serial ports, and a few DMA engines. This requires board vendors to either glue together standard interface devices with the DSPs, or invest heavily in FPGAs and/or other PLDs to perform the interfacing. This becomes increasingly problematic as the board gets smaller, it now becomes quite impractical to have one FPGA/PLD for PCI, another for peripherals, and so on, in addition to multiple DSPs and memory. To accommodate small form factors, such as PC/104-Plus, a single, integrated interface device must be developed that is specific to the DSPs being implemented.

Introduction of DSP/ASIC Solutions

As the absence of these devices has stifled the emergence of small form-factor DSP solutions in the past, so too, the development of them should lead to the emergence of small form-factor DSP solutions in the future. The board vendor industry is just now creating these integrated interface devices for DSP.

Recently, BittWare (Concord, NH) has developed a SharcFIN (SHARC Flexible Interface Node) ASIC that has, among other things, enabled the development of two new PC/104-Plus DSP boards. This integrated interface device is targeted at Analog Device's SHARC® family of DSPs. As shown in Figure 1, the SharcFIN provides a comprehensive set of bus interfaces and peripherals for the SHARC DSPs and greatly simplifies board-level design. In practice, there are actually several incarnations of the SharcFIN to interface to, and support, the specific needs of the various versions of the SHARC DSPs.

Figure 1: Block diagram of simplified DSP board using SharcFIN ASIC

SHARC DSP Primer

To further explore the SharcFIN and board architectures, a basic understanding of the SHARC must first be established. Analog Devices has optimized SHARC's "super" Harvard architecture, shown in Figure 2, to enable all variety of real-time embedded applications. The unique memory architecture - two large on-chip, dual-ported SRAM blocks coupled with the sophisticated I/O processor and a dedicated I/O bus - gives the SHARC the bandwidth for sustained high-speed computations. Performance is predictably high (up to 600 MFLOPS for the ADSP-21160M) and sustained, just as it should be for real-time embedded DSP development. In addition, in includes an external port that has a built-in arbitrator that allows up to 6 DSPs to be gluelessly interconnected into a multiprocessing cluster with transparent multiprocessing memory space (MMS) addressing. The serial ports and link ports also provide very powerful I/O and inter-processor communications resources.

Figure 2: Block diagram of SHARC "Super-Harvard" Architecture

SharcFIN Implementation Details

The first function of the SharcFIN must be to interface to the SHARC external port. Since there are several variants of this external bus across the SHARC family - bit width (32, 48, & 64 bits), timing, speed, and memory control - there must be different versions of the SharcFIN to interface to different SHARCs. Currently, there are SharcFINs that interface to both the new ADSP-21160M and the low-cost ADSP-21065L. Both versions also integrate a full-featured SDRAM controller. In the case of the ADSP-21160, this allows the SHARC to access SDRAM using burst mode access, providing low cost bulk memory up to 512MB - at sustained data rates of 400MB/sec. In the case of the ADSP-21065L, which already has an SDRAM controller built-in, the SharcFIN's independent SDRAM controller allows direct access the SDRAM (e.g. from PCI) without having to go through the DSP.

The second most obvious function of the SharcFIN is to interface to PCI. Once again, variants rule. The high-end ADSP-21160M has a 64bit external port, and has a tremendous capacity for data flow. Therefore, the SharcFIN for this SHARC implements a full 64-bit/66MHz master PCI interface. Conversely, the ADSP-21065L has a 32bit external port, and is targeted at low-cost applications; its SharcFIN implements a 32bit/33MHz or 32-bit/66MHz master PCI interface. Both implementations are PCI rev 2.2 compliant and provide 16-Bytes of configurable PCI mailbox registers.

A third bus interface is provided by the SharcFIN's Peripheral bus. This is a general-purpose utility bus that allows easy interface to standard microprocessor peripherals such as UARTs and FLASH memory. It provides a simple, glueless way to add additional functionality to a DSP board. The I2C/Serial controller integrates some of the most common peripheral requirements right into the SharcFIN. Uses include UART control, data communications, SharcFIN interconnection, as well as hardware configuration and identification.

Since most board-level DSP implementations require multiple processors, the SharcFIN integrates an extensive Interrupt and Flag multiplexor. This programmable resource allows each SHARC to select the sources of its hardware interrupts; sources include other processors, PCI, peripherals, and the internal DMA engines. This capability facilitates system-level control and coordination of multiprocessors and can greatly simplify software development.

Perhaps the most powerful advantage of the SharcFIN is the data flow capabilities afforded by the integrated interfaces. The feature rich set of DMA engines and data buffer FIFOs support very high-speed, real-time data flow with a minimum of processor overhead. Thanks to this sophisticated integration and buffering, the SharcFIN can sustain the full PCI bandwidth of 528MB/sec to or from the SHARCs and/or SDRAM, limited only by the speeds of the SHARC buses and memories. Future implementations will also support advanced data movement capabilities such as fly-by DMA and chaining.

Of course, all of these features and capabilities would be virtually useless were it not for support software. BittWare's DSP21K-SF toolkit provides host interface libraries (HIL), debug monitors and diagnostics, drivers, and configuration software for both Windows and Linux environments. Porting kits to other operating systems are also available. The SharcFINs are also I2O™ V1.5 compliant.

SharcFIN Enabled PC/104-Plus Boards

Using the SharcFIN to overcome space problems, BittWare has recently introduced 2 new PC/104-Plus DSP boards. The flagship product is the Hammerhead-PC/104-Plus board (HHP4), which features 2 ADSP-21160M SHARC processors. Providing over 1GFLOP of processing power and up to 512MB of SDRAM in a single PC/104-Plus board, this board proves that small form factors can pack as much power as desktop PCI, cPCI, or even VME. The HHP4, shown in Figure 3, also provides 2MB of Flash in addition to four external SHARC link ports (100MB/sec each) and two external serial ports (50Mbits/sec each) for use in inter-processor communication and/or I/O interfacing.

The Shortfin-PC/104-Plus (SFP4) addresses a completely different market need. It provides 2 ADSP-21065L SHARC processors, capable of 400MFLOPS, along with 16MB of SDRAM for as low as $500 in OEM volumes. The Shortfin also features 2MB of Flash, dual RS-232, two external serial ports each with dual-transmit and dual-receive functions (total of 133Mbits/sec per serial port), a global TDM/I2S serial bus, and 12-bits of DIO. BittWare's DSP21K-SF toolkit, a complete set of software development tools and drivers supports both the Shortfin and Hammerhead PC/104-Plus boards.

Figure 3: Hammerhead-PC/104-Plus board featuring Dual ADSP-21160s and SharcFIN

Other Small Form Factor DSP

In addition to PC/104 and PC/104-Plus, there is one other small form factor standard - the PCI Mezzanine Card (PMC). While quite popular, this standard is a mezzanine card only, and therefore, not truly a standalone form factor. Generally, PMCs are used as an enhancement to larger form factor boards such as cPCI and VME, and are therefore, probably not contained within the scope and intent of small form factor boards. However, with the finalization of the Processor PMC (PPMC), this standard could essentially become the 'mother-board' rather than the 'daughter-card'. In either case, the SharcFIN has also enabled BittWare to produce several DSP PMC boards. The Hammerhead-PMC packs four ADSP-21160Ms and up to 512MB of SDRAM, in addition to flash, link ports, and serial ports. The Audio-PMC+ features 2 ADSP-21065Ls and an 8-channel, high-performance analog and/or digital interface.

As mentioned earlier, in practice many small form factor DSP implementations are non-standard in form, some utilizing PCI and some not. These custom DSP solutions will also derive benefit from the SharcFIN and other integrated interfaces to DSPs, maybe even more than standard board-level solutions, as these ASICs will greatly improve time-to-market and reduce development cost, risk and board size.